My project was related to FIDES standard. It is reliability based project. I have calculated Reliability block diagram for PCB designs. In orcad allegro we have to make blocks and then use it.
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Metastability
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1. It is one of the phenomenon that happens in any system design. 2. So lets talk about it from digital circuit point of view. 3. It occurs in basic elements of digital circuits like flipflop or latch. 4. Especially when there is timing synchronization issues across from one FF to other etc. 5. we have to make sure that setup and hold time is satisfied.